C语言 编码器接口模式下STM32F103上的 Timer2 出现问题

Question

我在STM32F103C8T6上使用 Timer2 作为四通道增量编码器的接口时遇到问题。 我无法让程序进入 IRQHandler 并切换 LED。

我已经对 Timer4 进行了几乎相同的初始化，效果很好。所以问题是;初始化计时器 2 时我做错了什么？

不言而喻;我已经检查了接线。

请注意，我需要将 PA0 重新映射到 PA15，将 PA1 重新映射到 PB3。据我从 ST 参考手册中得知，我需要在 AFIO 寄存器中执行此操作。我还需要禁用 JTDI 和 JTDO 才能释放 PA15 和 PB3。我这样做对吗？

代码如下：

/*------------------------------------------------------------------------------------
MACROS
------------------------------------------------------------------------------------*/
#define GEARRATIO 9.68
#define ENCODERRESOLUTION 48
#define COUNTSPERREV GEARRATIO*ENCODERRESOLUTION // 9.68*48 = 465
/*------------------------------------------------------------------------------------
PREPROCESSOR
------------------------------------------------------------------------------------*/
#include <stm32f103xb.h>
#include "Timer2.h"
#include "IO.h"
/*------------------------------------------------------------------------------
Timer2 init (Encoder interface mode)
*------------------------------------------------------------------------------*/
void Timer2_init_Encoder(void)
{   /* Explain function here */
/* GPIO setup */
RCC->APB2ENR |= RCC_APB2ENR_IOPAEN; // Enable clock
RCC->APB2ENR |= RCC_APB2ENR_IOPBEN; // Enable clock
AFIO->MAPR |= (AFIO_MAPR_SWJ_CFG & 0b100); // Disable JTAG-DP and SW_DP to release PA15 and PB3
AFIO->MAPR |= (AFIO_MAPR_TIM2_REMAP & 0b01); // Remap PA0->PA15, PA1->PB3 (needs to be 5V tol.)
// PA15 (Timer 2 Input CH1)
GPIOA->CRH |= (GPIO_CRH_CNF15 & 0b01);  // 01 => Floating input (default)
GPIOA->CRH &= ~GPIO_CRH_MODE15; // 00 => Input mode (default)
// PB3 (Timer 2 Input CH2)
GPIOB->CRL |= (GPIO_CRL_CNF3 & 0b01);   // 01 => Floating input (default)
GPIOB->CRL &= ~GPIO_CRL_MODE3;  // 00 => Input mode (default)
/* Timer setup */
// Clock
RCC->APB1ENR |= RCC_APB1ENR_TIM2EN; // enable clock
TIM2->SMCR |= TIM_SMCR_SMS & 0b011; //011 => Encoder mode 3. Count on both TI1 and TI2 edges (gives 48 CPR)
// Timebase unit
TIM2->ARR = COUNTSPERREV - 1;   // CNT counts to this value and restarts
TIM2->RCR = 0x0000;             // set repetition counter
TIM2->CNT = 0;              // Set initial counter value (optional)
// Control Register
TIM2->CR1 |= TIM_CR1_URS;   // 1 => ONLY overflow/underflow generates interrupt
TIM2->CR1 |= TIM_CR1_ARPE;  // 1 => ARR is updated at each UEV
TIM2->CR1 &= ~TIM_CR1_UDIS; // 0 => Update Event (UEV) is generated at each overflow/underflow
TIM2->CCMR1 |= TIM_CCMR1_CC1S & 0b01;   // 01 => CC1 Channel is configured as input
TIM2->CCMR1 |= TIM_CCMR1_CC2S & 0b01;   // 01 => CC2 Channel is configured as input
TIM2->CCMR1 &= ~TIM_CCMR1_IC1F; // 0000 => No Input Capture filter
TIM2->CCMR1 &= ~TIM_CCMR1_IC2F; // 0000 => No Input Capture filter
TIM2->CCER &= ~TIM_CCER_CC1P;   // 0 => Rising edge
TIM2->CCER &= ~TIM_CCER_CC2P;   // 0 => Rising edge
// Interrupts
TIM2->DIER |= TIM_DIER_UIE; // DMA/Interrupt Register: Update Interrupt Enabled
NVIC->ISER[0] |= (1 << (TIM2_IRQn & 0x1F));  // enable interrupt globally
TIM2->CR1 |= TIM_CR1_CEN;   // enable timer (counter begins one clock-cycle after enabling)
}
/*------------------------------------------------------------------------------
Timer2 Update Interrupt Handler
*------------------------------------------------------------------------------*/
void TIM2_IRQHandler(void)
{
if ((TIM2->SR & TIM_SR_UIF) == 1)
{
IO_LED_Toggle();
TIM2->SR &= ~TIM_SR_UIF;    // clear UIF flag
}
}

希望你们能帮上忙。

问候 米克尔

Answer 1

我遇到了同样的问题。我的声压级实现：

引脚初始化和重新映射

GPIO_InitTypeDef gpio_cfg;
GPIO_StructInit(&gpio_cfg);
/* Каналы 1 и 2 таймера TIM3 - на вход, подтянуть к питанию */
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOB 
| RCC_APB2Periph_AFIO, ENABLE);
gpio_cfg.GPIO_Mode = GPIO_Mode_IPU;
gpio_cfg.GPIO_Pin = GPIO_Pin_15;
GPIO_Init(GPIOA, &gpio_cfg);
gpio_cfg.GPIO_Mode = GPIO_Mode_IPU;
gpio_cfg.GPIO_Pin = GPIO_Pin_3;
GPIO_Init(GPIOB, &gpio_cfg);
GPIO_PinRemapConfig(GPIO_FullRemap_TIM2, ENABLE);

要使用重新映射的引脚和 SWD 进行调试，请执行以下操作：

GPIO_PinRemapConfig(GPIO_Remap_SWJ_NoJTRST, ENABLE);
GPIO_PinRemapConfig(GPIO_Remap_SWJ_JTAGDisable, ENABLE);

Answer 2

我最终通过使用：

AFIO->MAPR |= AFIO_MAPR_SWJ_CFG_JTAGDISABLE; // JTAG-DP Disabled, SW-DP Enabled

而不是：

AFIO->MAPR &= ~AFIO_MAPR_SWJ_CFG_0; // JTAG-DP Disabled, SW-DP Enabled
AFIO->MAPR |= AFIO_MAPR_SWJ_CFG_1;  //                  "
AFIO->MAPR &= ~AFIO_MAPR_SWJ_CFG_2; //                  "

根据参考手册(RM0008(中的第176页，我设置了正确的寄存器。虽然无法弄清楚区别。 也许您只允许设置一个位。不过没有意义，因为我尝试像这样单独设置CFG_1：

AFIO->MAPR |= AFIO_MAPR_SWJ_CFG_1;