调试 IAR 汇编的 ARM Cortex-M 硬故障

Question

以下为 GCC 编写的代码 我想知道如何在IAR编译器下编译此代码

Default_Handler:
/* Load the address of the interrupt control register into r3. */
ldr r3, NVIC_INT_CTRL_CONST
/* Load the value of the interrupt control register into r2 from the
address held in r3. */
ldr r2, [r3, #0]
/* The interrupt number is in the least significant byte - clear all
other bits. */
uxtb r2, r2
Infinite_Loop:
/* Now sit in an infinite loop - the number of the executing interrupt
is held in r2. */
b  Infinite_Loop
.size  Default_Handler, .-Default_Handler
.align 4
/* The address of the NVIC interrupt control register. */
NVIC_INT_CTRL_CONST: .word 0xe000ed04

/* The prototype shows it is a naked function - in effect this is just an
assembly function. */
static void HardFault_Handler( void ) __attribute__( ( naked ) );
/* The fault handler implementation calls a function called
prvGetRegistersFromStack(). */
static void HardFault_Handler(void)
{
__asm volatile
(
" tst lr, #4                                                n"
" ite eq                                                    n"
" mrseq r0, msp                                             n"
" mrsne r0, psp                                             n"
" ldr r1, [r0, #24]                                         n"
" ldr r2, handler2_address_const                            n"
" bx r2                                                     n"
" handler2_address_const: .word prvGetRegistersFromStack    n"
);
}

我确定有简单的语法更改以使其编译

Answer 1

我自己已经想通了，这是解决方案：

__asm volatile
(
" tst lr, #4                                                n"
" ite eq                                                    n"
" mrseq r0, msp                                             n"
" mrsne r0, psp                                             n"
" ldr r1, [r0, #24]                                         n"
" ldr r2, =prvGetRegistersFromStack                         n"
" bx r2                                                     n"
);