C语言中的Makefile问题

Question

    #-----------------------------------------------------------------------    ------
# Choose a compiler & its options
#--------------------------------------------------------------------------
CC   = gcc
OPTS = -W -O3
#--------------------------------------------------------------------------
# Add the debug flag to compile for use by a debugger
#--------------------------------------------------------------------------
#DEBUG=-g
#--------------------------------------------------------------------------
# Add the names of the directories
#--------------------------------------------------------------------------
SRCDIR= src
OBJDIR= obj
INCDIR= include
BINDIR= bin
#--------------------------------------------------------------------
# Add the rest of the source files. Don't forget to add the '' character
# to continue the line. You don't need it after the last source file
#--------------------------------------------------------------------
SRCS=$(SRCDIR)/Lab12.c  Function1.c  Function2.c  Function3.c                                    Function4.c           Function5.c 
#--------------------------------------------------------------------
# You don't need to edit the next few lines. They define other flags
# used in the compilation of the source code
#--------------------------------------------------------------------
INCLUDE = $(addprefix -I,$(INCDIR))
OBJS=${SRCS:$(SRCDIR)/%.c=$(OBJDIR)/%.o}
CFLAGS   = $(OPTS) $(INCLUDE) $(DEBUG)
#--------------------------------------------------------------------
# Add the name of the executable after the $(BINDIR)/
#--------------------------------------------------------------------
TARGET = $(BINDIR)/ Lab12
all: $(TARGET)
$(TARGET): $(OBJS) 
    ${CC} ${CFLAGS} -o $@ $(OBJS)
$(OBJS): $(OBJDIR)/%.o : $(SRCDIR)/%.c
    $(CC) $(CFLAGS) -c $< -o $@
clean:
    rm -f $(OBJS)
 cleanall:
    rm -f $(OBJS)
    rm -f Lab12
 #--------------------------------------------------------------------
 # Add a target named cleanall that will remove the object files as well
 # as the executable
 #--------------------------------------------------------------------

我所有的"头"文件都在包含文件夹中。我所有的源代码都在src文件夹中(Lab12.c，Function1.c，Function2.c...(。当我使用 make 命令时，我不断收到此错误。

生成文件：45：目标Function1.c' doesn't match the target pattern Makefile:45: target函数 2.c' 与目标模式不匹配生成文件：45：目标Function3.c' doesn't match the target pattern Makefile:45: target Function4.c' 与目标模式不匹配生成文件：45：目标"函数5.c"与目标模式不匹配gcc -W -O3 -Iinclude -c -o Function1.cGCC：无输入文件制造： *** [ 函数 1.c] 错误 1

我不太明白为什么它会这样。所有这些文件都在 src 代码文件夹中，那么为什么系统无法识别它们呢？

Answer 1

SRCS=$(SRCDIR)/Lab12.c  Function1.c  Function2.c  Function3.c 

似乎不对;你应该试试

SRCS=$(SRCDIR)/Lab12.c Function1.c Function2.c Function3.c

相反

更新

如果 Function1.c 等位于"$(SRCDIR("中，则还必须在这些文件前面附加目录。(M Oehm的评论(