FF/闩锁和其他警告

Question

我的VHDL代码出了什么问题？这是代码：

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
entity main is
    port(
        -- 50 MHz clock
        cp : in std_logic;
        -- Reset signal
        reset : in std_logic;
        -- PS/2 data and clock lines
        ps2d, ps2c : in std_logic;
        -- 7-segment display segments
        segments : out std_logic_vector (7 downto 0);
        -- Anode control
        an : out std_logic_vector (3 downto 0);
        -- Data out to LEDs
        dout : out std_logic_vector (7 downto 0)
    );
end main;
architecture Behavioral of main is
    -- Data from keyboard entity (scancode)
    signal data : std_logic_vector (7 downto 0);
    -- 7 segments of display
    signal segReg, segNext : std_logic_vector (6 downto 0);
    signal tickDone : std_logic;
begin
    -- Just an entity that reads PS/2 keyboard data
    -- rx_done is tick (20 ns)
    S1: entity keyboard port map ( cp => cp, ps2d => ps2d, ps2c => ps2c,
                          rx_done => tickDone, dout => data);
    dout <= data;
    an <= "1110";
    segments(6 downto 0) <= segReg;
    -- Turn off dot
    segments(7) <= '1';
    process (cp, reset)
    begin
        if reset = '1' then
            segReg <= (others => '0');
        elsif rising_edge (cp) then
            segReg <= segNext;
        end if;
    end process;
    process (tickDone, segReg)
    begin
        segNext <= segReg;
        if tickDone = '1' then
            if data = x"16" then
                -- Number 1
                segNext <= "1001111";
            elsif data = x"1E" then
                -- Number 2
                segNext <= "0010010";
            elsif data = x"26" then
                -- Number 3
                segNext <= "0000110";
            elsif data = x"25" then
                -- Number 4
                segNext <= "1001100";
            else
                segNext <= "1111111";
            end if;
        end if;
    end process;
end Behavioral;

当我尝试合成它/生成编程文件时，我会收到以下警告：

WARNING:Xst:819 - "C:/VHDL_projekti/PS2K/main.vhd" line 48: The following signals are missing in the process sensitivity list:
WARNING:Xst:2734 - Property "use_dsp48" is not applicable for this technology.
WARNING:Xst:1710 - FF/Latch  <segReg_0> (without init value) has a constant value of 0 in block <main>.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch  <segReg_1> (without init value) has a constant value of 0 in block <main>.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch  <segReg_2> (without init value) has a constant value of 0 in block <main>.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch  <segReg_3> (without init value) has a constant value of 0 in block <main>.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch  <segReg_4> (without init value) has a constant value of 0 in block <main>.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch  <segReg_5> (without init value) has a constant value of 0 in block <main>.
WARNING:Xst:1710 - FF/Latch  <segReg_0> (without init value) has a constant value of 0 in block <main>.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch  <segReg_1> (without init value) has a constant value of 0 in block <main>.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch  <segReg_2> (without init value) has a constant value of 0 in block <main>.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch  <segReg_3> (without init value) has a constant value of 0 in block <main>.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch  <segReg_4> (without init value) has a constant value of 0 in block <main>.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch  <segReg_5> (without init value) has a constant value of 0 in block <main>.
WARNING:Par:288 - The signal reset_IBUF has no load.  PAR will not attempt to route this signal.
WARNING:Par:283 - There are 1 loadless signals in this design. This design will cause Bitgen to issue DRC warnings.
WARNING:PhysDesignRules:367 - The signal <reset_IBUF> is incomplete. The signal

我一直在查看代码，没有发现任何错误，但很明显我做错了什么。

1. "以下信号在过程灵敏度列表"；这可能是Xilinx ISE错误吗？我不明白为什么我需要在第48行的过程灵敏度列表中的任何其他信号…

2. "由于其它FF/锁存器微调；好吧，我做错了什么？我根本不想用门闩。。。

3. "信号reset_IBUF没有负载。标准杆数不会尝试对该信号进行路由"这是什么意思？我的重置信号出了什么问题？为什么它是不完整的？

这段代码是我在Spartan-3启动板上使用PS/2键盘的尝试。实体"；键盘"；读取，并且工作正常（当我单独测试时，我在dout信号上得到正确的扫描代码（我在LED上看到它））rx_done是表示已成功读取扫描代码的刻度（20 ns）。

所以我只是想看看我是否能以某种方式识别扫描代码（在我的第二个过程中，我正在比较数据信号，并将正确的值输入segNext信号），并在七段显示器上显示一些内容。当我实现这一点时，我将实现正确的行为（检测所有扫描代码、额外钥匙以及钥匙按下和钥匙向上事件）。

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
entity main is
    port(
        -- 50 MHz clock
        cp : in std_logic;
        -- Reset signal
        reset : in std_logic;
        -- PS/2 data and clock lines
        ps2d, ps2c : in std_logic;
        -- 7-segment display segments
        segments : out std_logic_vector (7 downto 0);
        -- Anode control
        an : out std_logic_vector (3 downto 0);
        -- Data out to LEDs
        dout : out std_logic_vector (7 downto 0)
    );
end main;
architecture Behavioral of main is
    -- Data from keyboard entity (scancode)
    signal data : std_logic_vector (7 downto 0);
    -- 7 segments of display
    signal segReg, segNext : std_logic_vector (6 downto 0);
    signal tickDone : std_logic;
begin
    -- Just entity that reads PS/2 keyboard data
    -- rx_done is tick (20 ns)
    S1: entity keyboard port map ( cp => cp, ps2d => ps2d, ps2c => ps2c,
                          rx_done => tickDone, dout => data);
    dout <= data;
    an <= "1110";
    segments(6 downto 0) <= segReg;
    -- Turn off dot
    segments(7) <= '1';
    process (cp, reset)
    begin
        if reset = '1' then
            segReg <= (others => '0');
        elsif rising_edge (cp) then
            segReg <= segNext;
        end if;
    end process;
    process (tickDone, segReg, data)
    begin
        if tickDone = '1' then
            if data = x"16" then
                -- Number 1
                segNext <= "1001111";
            elsif data = x"1E" then
                -- Number 2
                segNext <= "0010010";
            elsif data = x"26" then
                -- Number 3
                segNext <= "0000110";
            elsif data = x"25" then
                -- Number 4
                segNext <= "1001100";
            else
                segNext <= "1111111";
            end if;
        else
            segNext <= segReg;
        end if;
    end process;
end Behavioral;

不幸的是，在这些编辑之后，我仍然有以下警告：

WARNING:Xst:1710 - FF/Latch <segReg_0> (without init value) has a constant value of 0 in block <main>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <segReg_1> (without init value) has a constant value of 0 in block <main>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <segReg_2> (without init value) has a constant value of 0 in block <main>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <segReg_3> (without init value) has a constant value of 0 in block <main>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <segReg_4> (without init value) has a constant value of 0 in block <main>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <segReg_5> (without init value) has a constant value of 0 in block <main>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <segReg_6> (without init value) has a constant value of 0 in block <main>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1710 - FF/Latch <segReg_0> (without init value) has a constant value of 0 in block <main>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <segReg_1> (without init value) has a constant value of 0 in block <main>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <segReg_2> (without init value) has a constant value of 0 in block <main>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <segReg_3> (without init value) has a constant value of 0 in block <main>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <segReg_4> (without init value) has a constant value of 0 in block <main>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <segReg_5> (without init value) has a constant value of 0 in block <main>. This FF/Latch will be trimmed during the optimization process.
WARNING:Par:288 - The signal reset_IBUF has no load.  PAR will not attempt to route this signal.
WARNING:Par:283 - There are 1 loadless signals in this design. This design will cause Bitgen to issue DRC warnings.

Answer 1

在组合过程中，您正在读取tickDone、segReg和data。敏感度列表中缺少后者，这会导致闩锁。

此外，不要使用STD_LOGIC_ARITH或STD_LOGIC_UNSIGNED。它们没有标准化，并且存在一些问题。http://parallelpoints.com/node/3

Answer 2

2） "由于其他FF/锁存微调，在块"OK，我做错了什么？我根本不想用门闩。。。

这说明这些存储元素是由常量驱动的，而不是锁存器。你模拟过这个吗？

Answer 3

您的第二个进程似乎试图使用tickDone作为时钟信号，但您没有正确使用它（即：如果rising_edge（tickDon）或类似的），所以您创建的是锁存器而不是触发器（如果tickDone='1'）。对于锁存器，当tickDone为高时，输出取决于数据信号的状态，而数据信号不在灵敏度列表中。最后，在敏感度列表中有了segReg，按照代码的编写方式，您正在将segReg异步分配给segNext。

您可能忘记了使用cp信号作为时钟将第二个进程中的所有内容封装在if语句中吗？这样你写的会更有意义。。。