c-在规则中使用makefile文件作为先决条件



我对make缺乏经验,我想复制一些第三方SDK提供的构建结构,并将其适应我自己的编译器和项目。

问题是,我发现一些规则是使用makefile作为先决条件生成的,比如:

...
$(eval $(1): Makefile | $(dir $(1)).) 
...

$(OUTPUT_DIRECTORY)/%.inc: Makefile | $(OUTPUT_DIRECTORY)
$(info Generating $@)
$(NO_ECHO)$(call dump, $(call target_specific, INC_PATHS, $*)) > $@

最初,他们的makefile是大写的(makefile(,而我正在处理的是小写的(makefile

*** No rule to make target 'Makefile', needed by '...'

我认为这是由于大写,所以在两个地方都改为小写并重试,但这次的错误是makefile被视为C文件(这是我的猜测…(

"makefile", line 1: error #171: expected a declaration
-include makefile.local
^
"makefile", line 67: error #8: missing closing quote
${CG_TOOL_ROOT}/include"
^
"makefile", line 99: error #10: "#" not expected here
.SUFFIXES: # ignore built-in rules
^
"makefile", line 100: error #10: "#" not expected here
%.d:       # don't try to make .d files
^
"makefile", line 100: error #8: missing closing quote
%.d:       # don't try to make .d files

这里可能有什么问题?我有什么东西不见了吗?

编辑1:这些是我尝试使用的文件。

Nordic将这些作为其SDK的一部分,用于使用arm平台的arm-gcc进行开发。每个项目有一个Makefile,主Makefile中包含一个Makefile.common

  • 生成文件
  • Makefile.common

另一方面,我正在尝试理解和复制相同的编译器,但对于另一个具有不同选项和语法的专有编译器(TI的cl430适用于MSP430平台(。从最初的Makefile.common中,我删除了对gnu-arm套件的一些引用,并用适当的编译工具取而代之。在makefile中,我也尝试复制与原件相同的结构,但使用了我的来源和选项。

  • 生成文件
  • makefile.common

为了清楚起见,原件是大写的,我的是小写的。

编辑2:

运行make --debug --print-data-base后,我发现:

错误出现在第一次尝试构建文件时:

Updating goal targets....
File 'default' does not exist.
File 'test_project' does not exist.
File '_build/test_project.out' does not exist.
File '_build/test_project/<SOURCE_FILE>.c.o' does not exist.
Must remake target '_build/test_project/<SOURCE_FILE>.c.o'.
Building file: "makefile"
Invoking: MSP430 Compiler
"cl430" -vmspx --use_hw_mpy=F5 <... a lot of options ...> --obj_directory="./_build"  "makefile"
"makefile", line 1: error #171: expected a declaration
-include makefile.local
^
[ ... more errors ...]

然而,从调试和DB信息中,我发现源文件规则确实需要makefile,并且makefile不是目标,但不知何故,它正在尝试构建它:

# Not a target:
makefile:
#  Implicit rule search has been done.
#  Last modified 2020-02-25 11:43:33.609423171
#  File has been updated.
#  Successfully updated.
_build/test_project/<SOURCE_FILE>.c.o: makefile | _build/test_project/.
#  Implicit rule search has been done.
#  Implicit/static pattern stem: '_build/test_project/<SOURCE_FILE>'
#  Modification time never checked.
#  File has been updated.
#  Failed to be updated.
# automatic
# @ := _build/test_project/<SOURCE_FILE>.c.o
# automatic
# % := 
# automatic
# * := _build/test_project/<SOURCE_FILE>
# automatic
# + := makefile
# automatic
# | := _build/test_project/.
# automatic
# < := makefile
# automatic
# ^ := makefile
# automatic
# ? := makefile
# variable set hash-table stats:
# Load=8/32=25%, Rehash=0, Collisions=1/30=3%
#  recipe to execute (from 'makefile.common', line 192):
@echo 'Building file: "$<"'
@echo 'Invoking: MSP430 Compiler'
"${CG_TOOL_ROOT}/bin/cl430" -vmspx --use_hw_mpy=F5 <... a lot of options ...> "$(shell echo $<)"
@echo 'Finished building: "$<"'
@echo ' '

Makefile的依赖是为了确保它在Makefile更改时重新构建。例如,如果更改Makefile中的CFLAGS或要编译或链接的规则,则此依赖关系将触发重建(提供的对象文件应该依赖于Makefile(。如果不依赖于Makefile,这些更改不会导致重建。

"makefile", line 1: error #171: expected a declaration形式的错误消息表明makefile作为源文件传递给生成错误消息的C编译器。

规则很可能会执行$(filter-out Makefile,$^)。您需要将所有出现的Makefile替换为makefile

CCD_ 18意味着CCD_ 19仍然是某些目标的先决条件。您可以通过将--debug --print-data-base命令行选项传递给make来查找这些目标。