我写了下面的代码,以便移动二进制数,我试图为设备cyclonII - EP2C20F484C7编译它,但得到这个错误:
Error (10779): VHDL error at shiftNbits.vhd(30): expression is not constant
Error (10658): VHDL Operator error at shiftNbits.vhd(30): failed to evaluate call to operator ""&""
VHD(30( 是以下行:
resultTemp <= A( N-1-numberOfShifts downto 0) & (numberOfShifts-1 downto 0 => '0');
我看到有些人问这个问题,他们得到的答案是编译器不喜欢N-1-numberOfShifts
或numberOfShifts-1
否定的想法。问题是我确保班次数
if numberOfShifts>=N then
resultTemp <= (N-1 downto 0 => '0');
我什至尝试在numberOfShifts
定义中添加范围:
variable numberOfShifts: integer range 1 to N-1;
以确保numberOfShifts-1
不是负面的。
顺便说一句,当我穿上A(0 downto 0)
我实际上得到一位向量时,如果A( -1 downto 0)
不合法,我如何定义 NULL 向量?
library ieee;
use ieee.numeric_std.all;
use ieee.std_logic_1164.all;
entity shiftNbits is
generic(N: integer := 8);
port (
typeOfShift : in std_logic_vector (1 downto 0);
enable : in std_logic;
A : in std_logic_vector(N-1 downto 0);
B : in std_logic_vector (N-1 downto 0);
result : out std_logic_vector(N-1 downto 0)
);
end shiftNbits;
architecture shiftNbitsGate of shiftNbits is
signal resultTemp: std_logic_vector(N-1 downto 0);
begin
process (typeOfShift, enable, A, B)
variable numberOfShifts: integer;
begin
numberOfShifts:= to_integer(unsigned(B));
if enable= '1' then
case typeOfShift is
when "00" => --RLA
if numberOfShifts>=N then
resultTemp <= (N-1 downto 0 => '0');
else
resultTemp <= A( N-1-numberOfShifts downto 0) & (numberOfShifts-1 downto 0 => '0');
end if;
when "01" => --RLC
numberOfShifts := numberOfShifts mod N;
resultTemp <= A( N-1-numberOfShifts downto 0) & A( N-1 downto N-numberOfShifts);
when "10" => --RRA
if numberOfShifts>=N then
resultTemp <= (N-1 downto 0 => A(N-1));
else
resultTemp <= (N-1 downto N-numberOfShifts => A(N-1)) & A( N-1 downto numberOfShifts);
end if;
when "11" => --RRC
numberOfShifts := numberOfShifts mod N;
resultTemp <= A( numberOfShifts-1 downto 0) & A( N-1 downto numberOfShifts);
when others => null;
end case;
else
resultTemp <= A; --what we should insert here?
end if;
end process;
result <= resultTemp;
end shiftNbitsGate;
resultTemp <= A( N-1-numberOfShifts downto 0) & (numberOfShifts-1 downto 0 => '0');
不能在硬件中的一条"线"(一组门/一个逻辑方程(中实现,因为它可能对应于许多不同的情况(每个班次一个(。
在 VHDL 中,您需要通过 if else 或案例选择来扩展所有这些可能性。
如果移位值是恒定的,代码确实可以合成,因此出现错误消息!