返回 CASE Calss 的值以及为什么在 Scala 中会发生这种情况?

Question

我是Scala的新生，并且热衷于研究火箭源代码(由Scala/Chisel开发(，我不明白下面的案例类源代码片段。我的问题是，当我们引用reg_cycle时，返回值(值？你能介绍一下为什么在Scala中会发生这种情况吗？

//source code for how to use case calss
val reg_instret = WideCounter(64, io.retire)
val reg_cycle = if (enableCommitLog) reg_instret else WideCounter(64)
if (xLen == 32) {
read_mapping += CSRs.mcycleh -> (**reg_cycle** >> 32)
read_mapping += CSRs.minstreth -> (reg_instret >> 32)
if (usingUser) {
read_mapping += CSRs.cycleh -> (reg_cycle >> 32)
read_mapping += CSRs.instreth -> (reg_instret >> 32)
}
}
//source code for case calss
case class WideCounter(width: Int, inc: UInt = UInt(1), reset: Boolean = true)
{
private val isWide = width > 2*inc.getWidth
private val smallWidth = if (isWide) inc.getWidth max log2Up(width) else width
private val small = if (reset) Reg(init=UInt(0, smallWidth)) else Reg(UInt(width = smallWidth))
private val nextSmall = small +& inc
small := nextSmall
private val large = if (isWide) {
val r = if (reset) Reg(init=UInt(0, width - smallWidth)) else Reg(UInt(width = width - smallWidth))
when (nextSmall(smallWidth)) { r := r + UInt(1) }
r
} else null  
val value = if (isWide) Cat(large, small) else small
lazy val carryOut = {
val lo = (small ^ nextSmall) >> 1
if (!isWide) lo else {
val hi = Mux(nextSmall(smallWidth), large ^ (large +& UInt(1)), UInt(0)) >> 1
Cat(hi, lo)
}
}
def := (x: UInt) = {
small := x
if (isWide) large := x >> smallWidth
}
}

Answer 1

reg_cycle是一个宽计数器。它初始化为不同的特定实例，具体取决于日志记录布尔值。

WideCounter有几个字段，可以通过其名称，宽度，inc和重置来访问。