我在Quartus Lite Edition中偶然发现了一个非常奇怪的行为。我正在使用带有Cyclone IV FPGA的DE2-115板为大学项目设置一个开发容器。
使用Quartus 19.1，一切都构建良好，并按预期工作，但如果我使用版本20.1，我看到过滤器需要17分钟而不是8秒。
在比较日志时，引起我注意的是，使用的资源从18897增加到118824逻辑单元，但RAM段从322减少到190。较高的资源量可能是拟合和路由过程需要17分钟的原因。
有人遇到类似的行为吗?有什么我应该激活/禁用的吗?
合成日志输出Quartus 19.1
...
[0m[0;32mInfo (128003): Physical synthesis algorithm combinational resynthesis using boolean division complete: estimated slack improvement of 745 ps
[0m[0;32mInfo (128001): Physical synthesis optimizations for speed complete: elapsed time is 00:00:07
[0m[0;32mInfo (16010): Generating hard_block partition "hard_block:auto_generated_inst"
[0m[0;32m Info (16011): Adding 1 node(s), including 0 DDIO, 1 PLL, 0 transceiver and 0 LCELL
[0m[0;32mInfo (21057): Implemented 19285 device resources after synthesis - the final resource count might be different
[0m[0;32m Info (21058): Implemented 6 input pins
[0m[0;32m Info (21059): Implemented 35 output pins
[0m[0;32m Info (21060): Implemented 16 bidirectional pins
[0m[0;32m Info (21061): Implemented 18897 logic cells
[0m[0;32m Info (21064): Implemented 322 RAM segments
[0m[0;32m Info (21065): Implemented 1 PLLs
[0m[0;32m Info (21062): Implemented 8 DSP elements
[0m[0;32mInfo: Quartus Prime Analysis & Synthesis was successful. 0 errors, 33 warnings
[0m[0;32m Info: Peak virtual memory: 1337 megabytes
[0m[0;32m Info: Processing ended: Wed Sep 15 08:32:55 2021
[0m[0;32m Info: Elapsed time: 00:01:04
[0m[0;32m Info: Total CPU time (on all processors): 00:01:13
...
合成日志输出Quartus 20.1
...
[0m[0;32mInfo (128003): Physical synthesis algorithm combinational resynthesis using boolean division complete: estimated slack improvement of 330 ps
[0m[0;32mInfo (128001): Physical synthesis optimizations for speed complete: elapsed time is 00:00:27
[0m[0;32mInfo (16010): Generating hard_block partition "hard_block:auto_generated_inst"
[0m[0;32m Info (16011): Adding 1 node(s), including 0 DDIO, 1 PLL, 0 transceiver and 0 LCELL
[0m[0;32mInfo (21057): Implemented 119080 device resources after synthesis - the final resource count might be different
[0m[0;32m Info (21058): Implemented 6 input pins
[0m[0;32m Info (21059): Implemented 35 output pins
[0m[0;32m Info (21060): Implemented 16 bidirectional pins
[0m[0;32m Info (21061): Implemented 118824 logic cells
[0m[0;32m Info (21064): Implemented 190 RAM segments
[0m[0;32m Info (21065): Implemented 1 PLLs
[0m[0;32m Info (21062): Implemented 8 DSP elements
[0m[0;32mInfo: Quartus Prime Analysis & Synthesis was successful. 0 errors, 25 warnings
[0m[0;32m Info: Peak virtual memory: 1181 megabytes
[0m[0;32m Info: Processing ended: Wed Sep 15 09:49:49 2021
[0m[0;32m Info: Elapsed time: 00:02:48
[0m[0;32m Info: Total CPU time (on all processors): 00:02:57
...
完整日志:https://github.com/t-crest/patmos/files/7169188/build_log_quartus_20.1.log
https://github.com/t-crest/patmos/files/7169189/build_log_quartus_19.1.log
我注意到在20.1日志中，它说了以下几次(粗体):
Info (125068): Revision "patmos"之前在Quartus主要软件版本19.1.0精简版。创造了Quartus Prime默认设置文件/opt/t-crest/帕特莫斯/硬件/第四的/altde2 - 115/patmos_assignment_defaults.qdf,其中包含来自Quartus的默认分配设置信息Prime软件版本19.1.0精简版。
Info(125069):在当前版本的Quartus Prime软件中更改了默认分配值-更改为默认值赋值包含在文件中/opt/intel_FPGA/第四的/linux64/assignment_defaults.qdf
您可能希望在.qsf文件中比较这些更改的默认设置是什么，因为这可能说明了逻辑推断方式的一些更改。
更具体地说，日志中引起我注意的是，在20.1版本中，它是这样说的:
Info(276014):发现12个未推断的RAM逻辑实例
还有很多关于异步读取的语句:
Info (276007): RAM logic "Patmos:comp|PatmosCore:cores_0|DataCache:dcache| directappedcache:dm|MemBlock_4:tagMem|mem"由于异步读逻辑， is未推断文件:/opt/t-crest/帕特莫斯/硬件/构建/帕特莫斯。v行:6420
但是，这些在19.1日志中不存在。相反，19.1日志列出了一堆具有同步RAM逻辑的非同步巨型函数，这些函数在20.1日志中没有出现。
Info (276029):Inferred altsyncram megfunction从以下设计逻辑:"Patmos:comp|PatmosCore:cores_0|DataCache:dcache|DirectMappedCache:dm|MemBlock_4:tagMem|mem_rtl_0">
所以这似乎是造成差异的罪魁祸首。试着弄清楚为什么ram被不同地推断，或者20.1版本认为是异步的信号的起源/约束。