VHDL编码错误"不支持检查时钟后的Else子句"

Question

代码的函数被赋予一个操作码，它将在时钟的上升沿执行任务。我是一名二年级本科生，因此任何帮助/意见都将受到的赞赏

library IEEE; 
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.NUMERIC_STD.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
entity ALU is   Port (
X,Y     :IN BIT_VECTOR(2 downto 0);
OPcode  :IN BIT_VECTOR(2 downto 0);
Z       :OUT BIT_VECTOR(5 downto 0);
CLK     :IN BIT;
TempValX:INOUT BIT_VECTOR(5 downto 0)); 
end ALU;
architecture Circuit of ALU is signal g: BIT_VECTOR(3 downto 0);
signal C: BIT_VECTOR(3 downto 0);
signal p, u, r : bit_vector(2 downto 0);
signal s: Bit_vector(5 downto 0);
Component ThreeBitFA is
PORT (X,Y   :IN BIT_VECTOR(2 downto 0);
C   :INOUT BIT_VECTOR(3 downto 0));
end component; begin adder:ThreeBitFA port map(
X => X,
Y => Y,
C => C);
Process(X,Y,CLK,OPcode)
begin
IF OPcode = "000" THEN ----------------ADD OPcode
IF (CLK'EVENT AND CLK = '1') THEN
tempvalx <= "00" & C;
Z <= tempvalx;
end if;
ELSIF OPcode = "001" THEN ----------------MULT OPcode
IF (CLK'EVENT AND CLK = '1') THEN
IF Y(0) = '1' THEN P <= X; ELSE P <= "000"; END IF;
IF Y(1) = '1' THEN u <= X; ELSE u <= "000"; END IF;
IF Y(2) = '1' THEN R <= X; ELSE R <= "000"; END IF;
z(0) <= P(0); 
z(1) <= P(1) XOR u(0); s(0) <= P(1) AND u(0);
z(2) <= P(2) XOR u(1) XOR R(0) XOR s(0); s(1) <= s(0) AND P(2); s(2) <= u(1) AND R(0);
z(3) <= u(2) XOR R(1) XOR s(1) XOR s(2); s(3) <= s(2) AND s(1); s(4) <= u(2) AND R(1);
z(4) <= R(2) XOR s(3) XOR s(4); s(5) <= s(3) AND s(4); 
z(5) <= s(5);
end if;
ELSIF (OPcode = "010") THEN ------------AND OPcode
IF (CLK'EVENT AND CLK = '1') THEN
Z <= "000" & (X AND Y);
end IF;
ELSIF (OPcode = "011") THEN ------------OR  Opcode
IF (CLK'EVENT AND CLK = '1') THEN
Z <= "000" & (X OR Y);
end IF;
ELSIF (OPcode = "100") THEN ------------XOR Opcode
IF (CLK'EVENT AND CLK = '1') THEN
Z <= "000" & (X XOR Y);
end IF;
ELSIF (OPcode = "101") THEN ------------NOT Opcode
IF (CLK'EVENT AND CLK = '1') THEN
Z <= "000" & (NOT X);
end IF;
ELSIF (OPcode = "110") THEN -----------Rshift OPcode
IF (CLK'EVENT AND CLK = '1') THEN
TempValX <= "000" & X;
Z <= '0' & TempValX(5 downto 1);
ELSIF (OPcode = "111") THEN -----------Lshift OPcode
IF (CLK'EVENT AND CLK = '1') THEN
TempValX <= "000" & X;
Z <= TempValX(4 downto 0) & '0';
end IF;   
ELSE
Null;
END IF;  
END IF; END Process; end Circuit;

Answer 1

有几件事很突出。

1. 如果您只需要"在时钟的上升沿执行任务"，那么您只需要在进程敏感度列表中输入"CLK"。

2. 进程内部if-else中的优先级顺序是错误的。所有操作码解码逻辑都应该在上升沿时钟的检查范围内。