错误:非法输出或输入端口连接


module stimulus;
    reg [511:0]FROM_LS;
    reg CLOCK;
    reg [2:0]HMIC_CTRL;
    reg [20:0]BRANCH_CTRL;
    reg  [63:0]TO_IF_ID;
    reg FLUSH_CTRL;
    reg [20:0]TO_LS;
        
    // setup clock
    initial
     begin
            inst_line_buf ILB(FLUSH_CTRL,TO_LS,FROM_LS,CLOCK,HMIC_CTRL,BRANCH_CTRL,TO_IF_ID);
      #10 CLOCK = ~CLOCK;
  
    // apply stimulus
  
      FROM_LS[511:480]= 32'b00011_00000_00100_01100_11100_10111_01;
      FROM_LS[479:448]=32'b000_11000_00100_01111_11111_00011_1000;
  
      HMIC_CTRL[2:0]=3'b000;
      BRANCH_CTRL[20:0]=20'b00000_00000_00000_00000;
      #2 $display("FLUSH CONTROL=%b, TO_LS= %b",FLUSH_CTRL,TO_LS);
    end
endmodule

我得到以下错误:

# Loading work.inst_line_buf
# ** Warning: (vsim-3015) C:/Modeltech_pe_edu_10.0a/examples/stimulus_ilb.v(10): [PCDPC] - Port size (512 or 512) does not match connection size (1) for port 'from_LS'. The port definition is at: C:/Modeltech_pe_edu_10.0a/examples/inst_line_buf.v(1).
#         Region: /stimulus/ILB
# ** Warning: (vsim-3015) C:/Modeltech_pe_edu_10.0a/examples/stimulus_ilb.v(10): [PCDPC] - Port size (1 or 1) does not match connection size (21) for port 'clk'. The port definition is at: C:/Modeltech_pe_edu_10.0a/examples/inst_line_buf.v(2).
#         Region: /stimulus/ILB
# ** Warning: (vsim-3015) C:/Modeltech_pe_edu_10.0a/examples/stimulus_ilb.v(10): [PCDPC] - Port size (3 or 3) does not match connection size (512) for port 'hmic_ctrl'. The port definition is at: C:/Modeltech_pe_edu_10.0a/examples/inst_line_buf.v(3).
#         Region: /stimulus/ILB
# ** Warning: (vsim-3015) C:/Modeltech_pe_edu_10.0a/examples/stimulus_ilb.v(10): [PCDPC] - Port size (21 or 21) does not match connection size (1) for port 'branch_ctrl'. The port definition is at: C:/Modeltech_pe_edu_10.0a/examples/inst_line_buf.v(4).
#         Region: /stimulus/ILB
# ** Error: (vsim-3053) C:/Modeltech_pe_edu_10.0a/examples/stimulus_ilb.v(10): Illegal output or inout port connection for "port 'to_if_id'".
#         Region: /stimulus/ILB
# ** Warning: (vsim-3015) C:/Modeltech_pe_edu_10.0a/examples/stimulus_ilb.v(10): [PCDPC] - Port size (64 or 64) does not match connection size (3) for port 'to_if_id'. The port definition is at: C:/Modeltech_pe_edu_10.0a/examples/inst_line_buf.v(5).
#         Region: /stimulus/ILB
# ** Error: (vsim-3053) C:/Modeltech_pe_edu_10.0a/examples/stimulus_ilb.v(10): Illegal output or inout port connection for "port 'flush_ctrl'".
#         Region: /stimulus/ILB
# ** Warning: (vsim-3015) C:/Modeltech_pe_edu_10.0a/examples/stimulus_ilb.v(10): [PCDPC] - Port size (1 or 1) does not match connection size (21) for port 'flush_ctrl'. The port definition is at: C:/Modeltech_pe_edu_10.0a/examples/inst_line_buf.v(6).
#         Region: /stimulus/ILB
# ** Error: (vsim-3053) C:/Modeltech_pe_edu_10.0a/examples/stimulus_ilb.v(10): Illegal output or inout port connection for "port 'to_LS'".
#         Region: /stimulus/ILB
# ** Warning: (vsim-3015) C:/Modeltech_pe_edu_10.0a/examples/stimulus_ilb.v(10): [PCDPC] - Port size (21 or 21) does not match connection size (64) for port 'to_LS'. The port definition is at: C:/Modeltech_pe_edu_10.0a/examples/inst_line_buf.v(7).
#         Region: /stimulus/ILB
# Error loading design

除非您向我们展示完整的错误消息,以及您的vsim命令行和一些相关的Verilog代码,否则我们只能建议您搜索您的错误消息。

例如,来自modelsim_FAQ:

ModelSim仿真选项没有已正确设置(项目设置>ModelSim> Options)进行如下操作更改:右键单击模拟选项卡或选择"项目>设置>仿真"Testbench模块名称:指定您的testbench模块名顶层测试台架中的实例名:DUT的实例名请参阅下面的截图是一个例子。

更新:现在您已经添加了一些代码,ILB看起来很可疑。您首先使用它作为inst_line_buf模块的实例名,然后在initial块中再次使用它,看起来像一个函数或任务调用。我的猜测是,您希望它在initial块之外,但使用端口连接:

inst_line_buf ILB (FROM_LS,CLOCK,HMIC_CTRL,TO_IF_ID,FLUSH_CTRL,TO_LS);

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